Continued from part 3.
The obvious choice is to design a readout system for the RadIcon sensor. As we have seen, this entails design of an analog stage followed by a suitably fast ADC as we clock the sensor unit at 2MHz. Going with the OPA2353 and the ADS805 as suggested in the Teledyne reference design, I would have to deal with a data rate of 2 mega-samples per second (MSPS), 12 bits each, and from 8 independent modules. This results in a total of 512 kB x 12 = 6 MB that arrive within approximately 170 ms. This high data rate explains Rad-Icon's use of a DMA controller and the flimsy FIFO.
Digital data acquisition boards are available, but I decided against using a PC-based solution. Most manufacturers do not offer Linux drivers, and use of Linux is a design prerequisite. Moreover, I would again be locked into a proprietary hardware component. Lastly, a FIFO-based design is not overly elegant as the FIFO can insure only against short delays on the PC side. The alternative is to buffer the entire image in temporary RAM storage and read it out at the PC's leisure. For this purpose, I would need 12 parallel RAM chips with 512kB capacity and a hardware address counter that drives the RAM address directly from the module clock. A list of sub-modules emerges:
There is an alternative approach, however -- let's call it Plan B. Plan B is simple: Place a scintillator plate underneath the Faxitron's image window, mount a camera underneath, facing upward, and focus it on the scintillator plate. Take a photo of the scintillator plate while the x-rays are on. Instant x-ray image!
Any sensitive camera would do, even a SLR. I found a Hamamatsu camera in my lab that was originally used to image gels under fluorescent light. As a low-light camera, it might be suitable.
Disassembly of the camera revealed it to be a Hamamatsu C9260-001 board camera with approximately 1.3 megapixels resolution. An obscure driver can still be found on some even more obscure Internet sites (careful: virus risk!). It turned out that minimal functionality could be gained under Windows 2000 with this driver (thanks, Bill Dunning!). The camera delivers 1344x1024 pixels at 12 bits resolution. Its integration time is up to 20 seconds, and the lens is pretty powerful. However, even under ideal conditions, a 10cm window would lead to a spatial resolution of 75 microns, which is about four times less than the Rad-Icon sensor.
One of the challenges I encountered throughout is exemplified by this camera. Hamamatsu no longer offers support, and the software is for USB, requires a proprietary driver, and is Windows-only. I have no software for this specific camera. I contacted Hamamatsu, but the help and support I received was ... zilch.
These are plenty of good reasons not to buy from Hamamatsu -- once their support expires, you are left on your own with their proprietary black-box hard- and software. In fact, the same appears to apply to Faxitron as well. As mentioned earlier, Faxitron, initially appearing to try to be helpful when I called, clammed really shut when they realized the depth of the questions I was asking. This leaves me with the same scenario: No support, no in-depth information. And, as you can imagine, I will most certainly not buy from Faxitron even if I had the money -- after all, if I pay serious money for a serious piece of equipment, I expect either support for the lifetime of the device or the tools to provide the support myself.
As a side note, customer support does not have to be as abysmally bad as that from Hamamatasu or Faxitron. For example, a company I purchased from for a completely unrelated research project, Quantum Northwest (manufacturer of extremely precise and high-quality sample temperature controls), turned out to be extremely helpful: When I had questions regarding the USB interface and regarding the stirrer control, I was connected with a real engineer. I was given all information I requested, and this included a partial circuit schematic! Take note, manufacturers: When I need precision photonics equipment next time, my first go-to address will be Quantum Northwest.
Here is an interesting observation: The Faxitron does not appear to have any lead layers -- only the inner cabinet and the outer enclosure, both apparently either sheet metal or stainless steel. How much radiation escapes? Measurement shows: not much. In fact, unlike my CT, which uses 140kV, the Faxitron needs much less of a radiation shield. Consider: The maximum high voltage is 35kV. NIST provides x-ray attenuation coefficients. At 35keV (worst case), lead has an attenuation coefficient of approximately 180 cm-1, and iron, 46 cm-1 (specific weights: 11.3 g/cm3 and 7.8 g/cm3, respectively). For completeness, aluminum (specific weight 2.2 g/cm3) has an absorption coefficient of approximately 2.16 cm-1, which is dramatically lower than the previous two metals.
A layer of 1/16 inch lead would block over 99.9999% of all radiation, and iron of the same thickness, 99.94%. Obviously, scattered radiation is less energetic, and the blocking capability of iron increases accordingly. This explains why no lead is needed. Sheet iron and stainless steel are a good second choice for low energies, and I believe that I'll pass ESD inspection with an iron enclosure alone.
|Figure 8a: Image of a CPU fan||Figure 8b: Image of collimator slits|
The shortcomings are immediately visible. The background has a cloud-like texture, which is caused by the scintillator plate. Moreover, even with 20s exposure time, the dynamic range of the camera is not reached. Low contrast in higher-absorbing regions is the consequence. The slit image reveals an actual resolution of 0.14mm per pixel and an edge spread over 6 pixels (0.84mm). Images with this quality are unsatisfactory. However, Plan B is still viable with the following modifications:
|Figure 9: Block diagram of the analog stage. The differential input signal (OUTS/OUTR) of the RadIcon sensor is amplified by a differential amplifier and fed into the differential inputs of a fast ADC. Sensor module and ADC are clocked synchronously. Since I am crossing PCBs, an output buffer is provided. Gain and offset (Vref) of the difference amplifier should be controllable by digital potentiometers. The output enable signal (OE) allows to prevent the signals from colliding on the bus.|
The module provides two signals, FRAME and LINE. LINE goes high during the read-out of each 512-pixel line of the sensor. There is a segment of 25 "junk" pixels between each line that should not be stored in memory. FRAME stays high during the entire read-out. It would be most convenient to use a logical AND between the clock signal and LINE to increment the memory address. FRAME can serve as a logic signal that a microcontroller can poll to determine the end of the data transfer.
This concept brings us to the digital part. A block diagram is shown in Figure 10. Each module can write directly into its buffer RAM, and the address of the buffer RAM is incremented automatically with the clock signal. The module's LINE signal is high while valid pixels are read. Due to the 6-cycle conversion delay of the ADC, the LINE signal needs to be delayed, and we call this delayed line signal DLINE. A logical AND of clock with DLINE gives us the valid address counter clock. More specifically, on the falling edge of this signal, we latch the ADC data into the SRAM via its negative WR input, and we increment the address counter on the next rising edge. This process takes place without microcontroller intervention at the full rate of 2MHz.
|Figure 10: Block diagram of the digital section. The central element is a static RAM (SRAM) that serves as buffer. Since each module outputs 12 bits, 12 SRAM chips are needed for 8 modules. Each SRAM is directly connected to the digital output from the analog module, and its data can be propagated to a common data bus via an output buffer. An address counter exists with 19 stages. The address counter is directly incremented by the clock signal with two exceptions: First, the addresses count up only when the sensor's LINE signal is high (i.e., valid data is generated), and second, the LINE signal is delayed by 6 clock cycles to match the 6-cycle conversion delay of the ADC. This is done in the timing circuit.|
The third and last component is the readout system. The porpose of this part is to transfer the data from the SRAM to the attached host PC at the PC's leisure. This part can be controlled by a conventional microcontroller. The microcontroller's job is to read some data from the SRAM and then transfer it to the PC and wait for an acknowledgement from the PC. At the same time, the microcontroller needs to understand some basic control commands to, for example, start an exposure, set acquisition parameters, or begin data transfer.
As can be seen in Figure 10, each SRAM chip can place its data on a common data bus, from where the microcontroller can read it and propagate it to some form of interface. The microcontroller needs to have its independent means to increment the address counter. Moreover, the microcontroller is responsible for the control of the various enable signals so that bus collisions are prevented, and for resetting the address counters to zero before each acquisition and before the readout.
In a nutshell, the acquisition consists of the following steps, all under control of the central microcontroller:
With this general design outline, let's continue to the details in Part 5.